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schultzsch  
#1 Posted : Monday, October 5, 2015 4:46:29 PM(UTC)
schultzsch

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Hello!

I have a problem with my B3SE and Cronus(45 and 49mhz clocks).
When I turn off SW2:4 or as others will say when I bypass es9018 ASRC and OSF the dac goes into mono, outputting on both channels(L,R) the signal that comes from pc as left channel.

I will attach 2 photos with sw2:4 in on and off, first being with the switch in on position

asrc and osf ON

asrc and osf OFF(bypass)


Note that the MCK arrives from underneath the board.

What do else should I check?


Also SW2:5(spdif auto-detect) seems to change the sound. When I put the switch in off it lowers the high frequency rolloff. Really strange...


Thanks

Edited by user Monday, October 5, 2015 4:47:46 PM(UTC)  | Reason: Not specified

schultzsch  
#2 Posted : Thursday, October 8, 2015 8:22:48 PM(UTC)
schultzsch

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I also noticed that when playing dsd128 with foobar(foo_dsd_asio v0.7.2 setup for asio native and dsd to dsd method sdm type a and fs dsd128 ) and amanero the dac unlock for long periods of time.


If I play the same dsd and I play a little bit with the fs setting in foobar I get the following results:
for dsd64 it will lock in a short time an play music without any strange noises, not even when I skip the track
for dsd256 it will lock but sometimes will burst some kind of noise, same thing if I skip the track

If I play a dsd64 file at fs dsd64 it will play fine and for a dsd256 file with fs at dsd256 too I get same noise burst
This time all the switches are in on and I am running synchronously
Russ White  
#3 Posted : Monday, October 12, 2015 9:30:01 PM(UTC)
Russ White

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Sound like you may want to custom program your ES9018 via I2C.

Make sure you have not reversed your switches. :)

I made the switch that disables the jitter reduction also disable the OSF - this may explain some of what you are seeing.

To operate those two things independently you will need your own I2C controller.

In any case you really don't want to do disable the DPLL - you want to free wheel it. Set to be wide open (very high BW) if you are going to be synch clocking. That basically makes the DPLL do effectively nothing at all - but keeps t locked and the OSF working correctly.
schultzsch  
#4 Posted : Thursday, October 15, 2015 1:12:30 PM(UTC)
schultzsch

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Hello Russ,

Are you joking about the switches or what?
If the two photos are not very clear I can try to do others and post them here.

Wanted to ask...

As a controller for b3se what do you recommend?

I looked at hifiduino these days after seeing everybody is using it to control their dacs and saw that there is a customization in the code for the clock used, number of inputs and stereo/dualmono.

Regarding the clock customization of the clock there were two values 80mhz and 100mhz both for async operation.
If I use the dac in sync mode with clocks of 45mhz and 49mhz what should I define in the code for the clock?


Russ White  
#5 Posted : Thursday, October 15, 2015 2:04:51 PM(UTC)
Russ White

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I don't memorize switch positions - I was simply posting without a reference :)

People often make the mistake of reversing the switch positions - all I was saying is double check. I won't necessarily do it for you.

You could use any arduino or SoC you are confortable with. Or if using BBB the BBB itself.

Edited by user Thursday, October 15, 2015 2:13:26 PM(UTC)  | Reason: Not specified

schultzsch  
#6 Posted : Thursday, October 15, 2015 2:36:37 PM(UTC)
schultzsch

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Thanks Russ,

Btw in my point of view the switch is in On when the toggle is in On direction marked on the switch.B3SE arrived to me with all the toggles aligned with the On marking on both of the switches so I took this as the default config :)

Is there any photo or document there that could help me undestand this better?

About the clock definition, if I am right this is used only when es9018 asrc is used, right?
Russ White  
#7 Posted : Saturday, October 17, 2015 1:05:31 AM(UTC)
Russ White

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I am not familiar with the code - but what I know of the register itself is pretty simple. It is just a matter of math regardless of whether it is sync or async. You will just need to account for which clock is being fed.

As for the switches it appears you have them correctly oriented.

In any case you can read the I2C registers and see exactly what is going on in the DAC.
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