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julian  
#1 Posted : Monday, September 13, 2010 1:44:04 PM(UTC)
julian

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Hi,

I am trying to get a Metronome ASRC board up and running, but I am struggling.
Actually I set the DIP switches to run the SRC4192 in Output Master Mode 128fs, I2S output, I2S input.
The output clocks are properly generated and RDY pin is 0.
But actually no matter what comes in on PCMIN, the output always looks the same. Even when no data is on the PCMIN data line it shows spikes on the output. When input is there the spikes stay the same.

Any ideas what might cause this? Might the chip be defect?

Just to be sure: When moving the DIP switches the side where the "+" sign is drawn on the PCB means: set it to high, middle position is N/C and other end is GND?

Regards,
Julian
Russ White  
#2 Posted : Monday, September 13, 2010 4:30:04 PM(UTC)
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Have you verified the incoming PCM?
Russ White  
#3 Posted : Monday, September 13, 2010 8:18:26 PM(UTC)
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It is normal for the ASRC to try to output silence (which is itself signal) even when there is nothing on the input.
Russ White  
#4 Posted : Monday, September 13, 2010 8:18:55 PM(UTC)
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Yes you are interpreting the signs on the PCB correctly.
julian  
#5 Posted : Tuesday, September 14, 2010 4:39:05 AM(UTC)
julian

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I did some measurements with a proper scope now. Ch3 is the BCK, Ch2 is the LRCK and Ch1 is Data.

This is the input as delivered by the uC. It does 16Bit 48kHz. Actually the LRCK is around 50kHz which is due to the not matching clock dividing - but this is for testing only atm and I think the SRC4192 should be fine to deal with that. As one can see in the (second) screenshot the first data bit per channel starts with one clock cycle delay, after the edge on LRCK.

Edit: The input signal was a sine wave at 1kHz on one channel only, this is why there are only pulses in one phase of the LRCK.

UserPostedImage

Bigger Scale:
UserPostedImage

At the same time the output of the SRC4192 looks like this:

UserPostedImage

This is actually unchanged, no matter what the input is like. Any ideas what might go wrong there?

Edited by user Tuesday, September 14, 2010 11:54:34 AM(UTC)  | Reason: Not specified

julian  
#6 Posted : Wednesday, September 15, 2010 3:18:17 AM(UTC)
julian

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Would you actually agree that input signal looks ok?
Might the metronome module be defect?
julian  
#7 Posted : Thursday, October 14, 2010 5:37:05 AM(UTC)
julian

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Imho, the output can not be ok when it looks like this within no input-signal given. In the capture you see, that even the most significant bits are high at some places in the output. This really can not be silence.

What do you think?
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